Latest news and articles about Chip Design
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Huawei’s chip lead Teresa He has released an updated technical paper outlining the 'Tao Law,' a post-Moore’s Law scaling theory that uses 3D stacking and 'LogicFolding' to bypass traditional lithography limits. The paper includes mass-production data for the Kirin 2026, suggesting Huawei has found a viable path to high-performance silicon through architectural innovation rather than just transistor shrinking.
