# Lithography

Latest news and articles about Lithography

Total: 4 articles found

Detailed view of a circuit board showing various electronic components and traces.
Technology

The Silicon Siege: ASML Rebuts US Allegations of Export Control Violations

ASML has vigorously denied allegations from US Commerce Secretary Howard Lutnick regarding the unauthorized export of EUV lithography systems to China. The dispute highlights the escalating friction between Washington and its European allies over the enforcement of semiconductor export controls.

NeTe2026年6月20日 08:08
#ASML#Semiconductors#Export Controls
Detailed close-up photo of a circuit board highlighting microchip components and electronic circuits.
Technology

The Post-Moore Pivot: How Huawei’s 'Tao’s Law' Aims to Redefine the Global Semiconductor Race

Academician Chu Junhao discusses the shift from Moore’s Law to Huawei's 'Tao’s Law,' advocating for a new semiconductor strategy that focuses on architectural time-efficiency. This pivot represents China's strategic response to physical scaling limits and Western technological sanctions.

NeTe2026年6月2日 11:08
#Semiconductors#Huawei#Chu Junhao
Close-up of various microprocessor chips on a blue hexagonal patterned surface, highlighting electronic technology.
Technology

Latency Over Lithography: Huawei’s 'Tau Law' Seeks to Redefine the Semiconductor Frontier

Huawei has introduced the 'Tau Law' as a new benchmark for semiconductor progress, prioritizing signal transmission speed over transistor density. This strategic pivot allows the company to maintain a competitive edge in AI hardware despite being cut off from the world's most advanced chip-making tools.

NeTe2026年5月25日 14:38
#Huawei#Semiconductors#Moore's Law
Close-up of various microprocessor chips on a blue hexagonal patterned surface, highlighting electronic technology.
Technology

Beyond the Nanometer: Huawei’s “Tao Law” and the New Frontier of Silicon Sovereignty

Huawei has introduced the 'Tao (τ) Law,' a new semiconductor development principle that prioritizes reducing signal latency through 'logic folding' over traditional physical miniaturization. This strategy aims to achieve high-end performance parity with 1.4nm chips by 2031, effectively creating a workaround for current lithography restrictions.

NeTe2026年5月25日 08:08
#Huawei#Semiconductors#Moore's Law