China's UniVista Unveils Agentic EDA Tools and 3D Chip Design Matrix

Shanghai UniVista Industrial Software Group has introduced an updated electronic design automation (EDA) product portfolio at the 2026 IDAS Design Automation Industry Summit. The rollout centers on an 'Agentic EDA' strategy integrating autonomous software agents across digital verification, design-for-testability, and PCB systems, alongside UniVista 3DIC Designer, a physical design tool built for domestic advanced semiconductor nodes. The company also announced that its UniVista Simulator Plus won an industry product award at the summit, highlighting China's ongoing drive to build an autonomous full-stack chip design software ecosystem.

EDA software represents a critical bottleneck for China's semiconductor ambitions amid ongoing access restrictions to leading global toolchains. By moving beyond piecemeal software patches toward native 3D physical design and autonomous AI agents, domestic EDA developers aim to support alternative scaling techniques such as 3D packaging and logic folding. If successfully adopted by commercial foundries and fabless designers, these tools could help bridge architectural gaps in domestic advanced chip development.

Shanghai UniVista Industrial Software Group unveiled a suite of next-generation electronic design automation (EDA) products during the 2026 IDAS Design Automation Industry Summit organized by China's EDA2 consortium, according to state media outlet People's Daily. The product release focuses on two main tracks: an autonomous 'Agentic EDA' architecture and native three-dimensional physical chip design. The company indicated that its new software strategy aims to move domestic EDA development past piecemeal tool enhancements toward architectural-level restructuring capable of supporting advanced domestic manufacturing processes. UniVista's Agentic EDA strategy deploys autonomous software agents across the chip verification and testing pipeline. The newly released suite includes four specialized digital verification agents covering software simulation, verification debugging, regression test management, and hardware emulation alongside FPGA prototyping. According to UniVista Chief Technology Officer He Peixin, the core engineering value of generative AI in EDA does not lie in standalone model predictions, but in establishing a verifiable, closed-loop workflow connecting design goals, expert methodologies, real-time tool runtime feedback, and traceable evidence chains. Alongside verification tools, UniVista expanded its design-for-test (DFT) and board-level offerings. These include UniVista Tespert AIMBIST, an AI-empowered memory built-in self-test platform covering design planning, IP insertion, diagnostics, and yield analysis, as well as an updated AI-native electronic system design platform dubbed UniVista Archer AI+. In backend design, the firm launched UniVista 3DIC Designer, described as a domestic three-dimensional chip physical design platform. The tool is engineered specifically for domestic advanced process nodes to support 3D cell-level digital backend design and enable logic folding techniques, which designers increasingly rely on as traditional geometric transistor scaling faces severe physical and geopolitical constraints. During the summit, the organizers also awarded UniVista's digital simulator, UniVista Simulator Plus (UVS+), the Gold Reputation Product Award at the third 'China Core' EDA Special Awards. UniVista stated that the recognition reflects broad practical adoption across commercial semiconductor projects as domestic chipmakers seek full-stack alternatives to dominant international software vendors.